Pascal and Francis Bibliographic Databases

Help

Search results

Your search

kw.\*:("Arquitectura reconfigurable")

Document Type [dt]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Publication Year[py]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Discipline (document) [di]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Language

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Author Country

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Results 1 to 25 of 282

  • Page / 12
Export

Selection :

  • and

And Then There Were None: A Stall-Free Real-Time Garbage Collector for Reconfigurable HardwareBACON, David F; CHENG, Perry; SHUKLA, Sunil et al.Communications of the ACM. 2013, Vol 56, Num 12, pp 101-109, issn 0001-0782, 9 p.Article

Design of reconfigurable manufacturing systemsKOREN, Yoram; SHPITALNI, Moshe.Journal of manufacturing systems. 2010, Vol 29, Num 4, pp 130-141, issn 0278-6125, 12 p.Article

An Architecture of Prototyping System for Dynamic Partial Reconfiguration on FPGAYAMAWAKI, Akira; SERIKAWA, Seiichi.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2010. 2010, pp 263-266, isbn 1-60132-140-6, 4 p.Conference Paper

Standards for Sustainability - Growing Markets and Improving Access for Reconfigurable SupercomputingSTAHLBERG, E.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2010. 2010, pp 121-126, isbn 1-60132-140-6, 6 p.Conference Paper

Automatic Bus Macro Placement for Partially Reconfigurable FPGA DesignsCARVER, Jeffrey M; PITTMAN, Richard N; FORIN, Alessandro et al.ACM International Symposium on Field-Programmable Gate Arrays. 2009, pp 269-272, isbn 978-1-60558-410-2, 1Vol, 4 p.Conference Paper

Efficient Implementation of (Self-)Reconfigurable SystemsSIGÜENZA-TORTOSA, D. A; HIGUERA-TOLEDANO, M. T; BOTELLA-JUAN, G et al.Parallel and distributed processing techniques and applications. International conferenceWorldComp'2010. 2010, pp 74-80, isbn 1-60132-156-2 1-60132-157-0 1-60132-158-9, 7 p.Conference Paper

Novo-G: A View at the HPC Crossroads for Scientific Computing ERSA Keynote for Reconfigurable Supercomputing PanelGEORGE, A; LAM, H; LAWANDE, A et al.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2010. 2010, pp 21-30, isbn 1-60132-140-6, 10 p.Conference Paper

Leveraging Parallelism with CUDA and OpenCLPARK, S; SHIRES, D; ROSS, J et al.Parallel and distributed processing techniques and applications. International conferenceWorldComp'2011. 2011, pp 829-832, isbn 1-60132-193-7 1-60132-194-5 1-60132-195-3, 4 p.Conference Paper

A Dynamic Reconfigurable MRAM based FPGATORRES, Lionel; GUILLEMENET, Yoann; ZAHID AHMED, Syed et al.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2010. 2010, pp 31-40, isbn 1-60132-140-6, 10 p.Conference Paper

A Figure-of-Merit for Pattern Reconfigurable AntennasRODRIGO, Daniel; ROMEU, Jordi; CAPDEVILA, Santiago et al.IEEE transactions on antennas and propagation. 2013, Vol 61, Num 3, pp 1448-1453, issn 0018-926X, 6 p.Article

Antenna design exploiting duplex isolation for 4G application on handsetsDEL BARRIO, S. Caporal; PEDERSEN, G. F.Electronics letters. 2013, Vol 49, Num 19, pp 1197-1198, issn 0013-5194, 2 p.Article

A Reconfigurable Neural NetworkBREITLER, Alan L.Artificial intelligence. International conferenceWorldComp'2011. 2011, pp 495-498, isbn 1-60132-183-X 1-60132-184-8 1-60132-185-6, 4 p.Conference Paper

Combining Service Orientation with Product Line Engineering : Software Product LinesLEE, Jaejoon; KOTONYA, Gerald.IEEE software. 2010, Vol 27, Num 3, pp 35-41, issn 0740-7459, 7 p.Article

A Run-Time Evolvable Hardware TutorialTORRESEN, Jim.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2011. 2011, isbn 1-60132-177-5, p. 15Conference Paper

Hardware implementation of subtractive clustering for radionuclide identification : HARDWARE FOR BIOINFORMATICS APPLICATIONSFARIAS, Marcos Santana; NEDJAH, Nadia; DE MACEDO MOURELLE, Luiza et al.Integration (Amsterdam). 2013, Vol 46, Num 3, pp 220-229, issn 0167-9260, 10 p.Article

A Transparent and Adaptable Multiple-ISA Embedded SystemFAJARDO JUNIOR, Jair; RUTZIG, Mateus B; CARRO, Luigi et al.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2011. 2011, pp 197-203, isbn 1-60132-177-5, 7 p.Conference Paper

Computing the Configuration Space Using Arrays with Reconfigurable Optical BusesJENQ, John.Parallel and distributed processing techniques and applications. International conferenceWorldComp'2011. 2011, pp 293-297, isbn 1-60132-193-7 1-60132-194-5 1-60132-195-3, 5 p.Conference Paper

i-Core: A run-time adaptive processor for embedded multi-core systemsHENKEL, Jörg; BAUER, Lars; HÜBNER, Michael et al.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2011. 2011, pp 163-170, isbn 1-60132-177-5, 8 p.Conference Paper

Self-reconfigurable embedded systems: from modeling to implementationGOGNIAT, Guy; VIDAL, Jorgiano; LINFENG YE et al.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2010. 2010, pp 84-93, isbn 1-60132-140-6, 10 p.Conference Paper

Importance analysis for reconfigurable systemsSHUBIN SI; LEVITIN, Gregory; HONGYAN DUI et al.Reliability engineering & systems safety. 2014, Vol 126, pp 72-80, issn 0951-8320, 9 p.Article

Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices : Reconfigurable SystemsKAMEDA, Toshihiro; KONOURA, Hiroaki; ALNAJJAR, Dawood et al.IEICE transactions on information and systems. 2013, Vol 96, Num 8, pp 1624-1631, issn 0916-8532, 8 p.Article

Formal framework for specifying dynamic reconfiguration of adaptive systemsKARIMPOUR, Jaber; ALYARI, Robab; NOROOZI, Ali A et al.IET software (Print). 2013, Vol 7, Num 5, pp 258-270, issn 1751-8806, 13 p.Article

Single-Cycle Multihop Asynchronous Repeated Traversal: A SMART Future for Reconfigurable On-Chip Networks : Toward a Coherent Multicore Memory ModelKRISHNA, Tushar; OWEN CHEN, Chia-Hsin; SUNGHYUN PARK et al.Computer (Long Beach, CA). 2013, Vol 46, Num 10, pp 48-55, issn 0018-9162, 8 p.Article

A hardware architecture for subtractive clusteringSANTANA FARIAS, Marcos; NEDJAH, Nadia; DE MACEDO MOURELLE, Luiza et al.International journal of high performance systems architecture (Print). 2011, Vol 3, Num 2-3, pp 167-173, issn 1751-6528, 7 p.Article

Reconfigurable and Evolvable Architectures and their role in Designing Computational SystemsTYRRELL, Andy M.Engineering of reconfigurable systems & algorithms. International conferenceWorldComp'2011. 2011, pp 148-156, isbn 1-60132-177-5, 9 p.Conference Paper

  • Page / 12